{"id":98373,"date":"2026-04-14T06:53:25","date_gmt":"2026-04-13T21:53:25","guid":{"rendered":"https:\/\/layla-hr.com\/semi\/98373\/"},"modified":"2026-04-14T06:53:25","modified_gmt":"2026-04-13T21:53:25","slug":"senior-staff-device-engineer-2","status":"publish","type":"post","link":"https:\/\/layla-hr.com\/semi\/98373\/","title":{"rendered":"Senior Staff Device Engineer"},"content":{"rendered":"","protected":false},"excerpt":{"rendered":"","protected":false},"author":2,"featured_media":0,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[73,80,92],"tags":[136],"area":[113],"income":[102,103,104],"checked_slug":[],"class_list":{"0":"post-98373","1":"post","2":"type-post","3":"status-publish","4":"format-standard","6":"category-catsub12","7":"category-catsub19","8":"category-catsub31","9":"tag-136","10":"area-other","11":"income-income01","12":"income-income02","13":"income-income03","14":"entry_article"},"acf":{"company":"\u30eb\u30cd\u30b5\u30b9 \u30a8\u30ec\u30af\u30c8\u30ed\u30cb\u30af\u30b9\u682a\u5f0f\u4f1a\u793e","jobtitle01":"Senior Staff Device Engineer","jobtitle02":"","jobdescription01":"Job Description\n\n\n\n\u3010Background\u3011\n\nThis team support SPS FET design for PCP. In the last year, two out of the four device engineers who no longer with the company. We are aslo supporting the new MV FET REXFET2 and REXFET3. The SPS FETs are critical for PCP and we enetering a period of incredible growth for SPS FETs where we are looking at volume sales increasing by 3x in the next 2 years.\n\n\u3010Job Description\u3011\n\nWe are seeking a Sr. Staff Design Engineer to develop cutting edge switching power MOSFETs for 12V to 80V applications. You will participate in the full product cycle from conception of architecture through final product characterization. This will involve the conception and development of novel power MOSFET device structures, optimizing those structures for performance and ruggedness, and developing test and characterization methods to demonstrate device capability and limits. You will work in a team of highly experienced device and process integration engineers to develop cost-effective, manufacturable devices for some of the most demanding of power applications. This is a high visibility position with potential to make significant business and technological impacts.\n\nDevelop novel, high-performance, high-reliability power switching device technology for one of our fast-growing business units\nWork closely with process engineers toward development of new process flows and design rules\nDesign and execute TCAD simulation experiments to center critical process and design parameters\nIdentify critical design parameters and process sensitivities which affect yield to pre-defined specifications\nCollaborate with internal CAD and layout teams to develop test mask and product mask layouts and parameterized cells (P-Cells)\nDesign and analyze process and design of split experiments\nWork closely with applications and test engineers to gather characterization data and ensure robust test methodologies\nHelp identify testing requirements for new technologies based on specific device architectures and application stresses\nAnalyze measured device and test structure data to solve problems and optimize device design and process\nProvide engineering support for existing power semiconductor products\n\n*The full details regarding your position scope as well as any future potential changes in work location and job scope will be provided during the interview process.\n\n\n\nQualifications\n\n\n\n\u3010MUST\u3011\n\nDemonstrated track record of commercially successful Power MOSFET developments\nSemiconductor Device Physics \/ Solid State Physics\nSemiconductor Device Process Integration\nSemiconductor Device Reliability Physics\nHigh Voltage VDMOS device engineering\nPower semiconductor device product development\nTCAD process and device simulation (preferably Sentaurus)\nProduct and test mask layout (preferably Cadence Virtuoso)\nDesign of Experiments methodology\nWorking familiarity with structural and chemical analysis for microelectronics\nWorking familiarity with power device test and characterization equipment and methodologies\nUnderstanding of switched-mode power applications and resulting device stresses\nConversational proficiency in English\nBusiness-level proficiency in Japanese\n\n\u3010WANT\u3011\n\nProduct and test mask layout (preferably Cadence Virtuoso)\nDesign of Experiments methodology\nWorking familiarity with structural and chemical analysis for microelectronics\nWorking familiarity with power device test and characterization equipment and methodologies\nUnderstanding of switched-mode power applications and resulting device stresses\n\n\u00a0\n\n\n\nAdditional Information\n\n\n\n\u672c\u30dd\u30b8\u30b7\u30e7\u30f3\u306b\u3054\u8208\u5473\u3092\u304a\u6301\u3061\u306e\u65b9\u306f\u3001\u4ee5\u4e0b\u306e\u9023\u7d61\u5148\u307e\u3067\u304a\u6c17\u8efd\u306b\u3054\u9023\u7d61\u304f\u3060\u3055\u3044\u3002\nIf you are interested in this position, please feel free to contact us at the details below:\nRecruiter:\u00a0Masana Ueno\n\n\u30eb\u30cd\u30b5\u30b9\u306f\u3001\u300cTo Make Our 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