{"id":98136,"date":"2026-04-09T07:35:27","date_gmt":"2026-04-08T22:35:27","guid":{"rendered":"https:\/\/layla-hr.com\/semi\/98136\/"},"modified":"2026-04-09T07:35:27","modified_gmt":"2026-04-08T22:35:27","slug":"sr-staff-analog-engineer-3","status":"publish","type":"post","link":"https:\/\/layla-hr.com\/semi\/98136\/","title":{"rendered":"Sr Staff Analog Engineer"},"content":{"rendered":"","protected":false},"excerpt":{"rendered":"","protected":false},"author":2,"featured_media":0,"comment_status":"","ping_status":"","sticky":false,"template":"","format":"standard","meta":{"_acf_changed":false,"footnotes":""},"categories":[112,92,64],"tags":[136],"area":[15],"income":[102,103,104],"checked_slug":[],"class_list":{"0":"post-98136","1":"post","2":"type-post","3":"status-publish","4":"format-standard","6":"category-other","7":"category-catsub31","8":"category-catsub03","9":"tag-136","10":"area-area13","11":"income-income01","12":"income-income02","13":"income-income03","14":"entry_article"},"acf":{"company":"\u30eb\u30cd\u30b5\u30b9 \u30a8\u30ec\u30af\u30c8\u30ed\u30cb\u30af\u30b9\u682a\u5f0f\u4f1a\u793e","jobtitle01":"Sr Staff Analog Engineer","jobtitle02":"","jobdescription01":"Job Description\n\n\n\nTo drive technical excellence in Analog design of power management integrated circuits, delivering hands-on block and top-level design from specification to clear database in collaboration with block lead designers.\n\n\u3010Key Responsibilities\u3011\n\nDesign, verification and simulation of CMOS Analog blocks for power management ICs including switching converter non isolated and\/or isolated, Power FET and its driver circuit, A\/D & D\/A Converters, Oscillators, Bandgap reference circuits,LDOs, and Ultra-Low meeting performance, area and power specifications.\nCollaborate with block leads to achieve system and design strategy for power management products.\nGuide layout team to ensure quality of layout of own design.\nDrive silicon debugging and design characterisation.\nDrive lab evaluation in collaboration with Application Engineers for own design.\nWorking closely with DFT engineers to ensure that own blocks follow existing strategy and implementation for DFT.\nWork closely with test and product engineers to support test development and ramp to production.\nCoach and mentor less experienced team members.\nTake technical leadership for sub-systems and driving them from specification to production ramp.\nInterpret requirement specifications to achieve system and design strategy for power management products.\n\n*The full details regarding your position scope as well as any future potential changes in work location and job scope will be provided during the interview process.\n\n\n\nQualifications\n\n\n\n\u3010MUST\u3011\n\nExperience in designing blocks for power management ICs\nSwitching converter (non isolated and\/or isolated), Power FET and its driver circuit\nAnalog blocks such as A\/D & D\/A converters, oscillators, bandgap reference circuits,LDOs\nTypically 8 \u2013 12 years experience in Analog\/Mixed-signal circuit design.\n\nLanguage Skills:\n\nEnglish: Proficient; able to perform all work-related tasks without difficulty\nJapanese: Conversational; capable of handling daily interactions\n\n\u3010WANT\u3011\n\nHigh voltage design\nExperience of Ultra-Low Iq circuits design is preferred.\n\n\nAdditional Information\n\n\n\n\u672c\u30dd\u30b8\u30b7\u30e7\u30f3\u306b\u3054\u8208\u5473\u3092\u304a\u6301\u3061\u306e\u65b9\u306f\u3001\u4ee5\u4e0b\u306e\u9023\u7d61\u5148\u307e\u3067\u304a\u6c17\u8efd\u306b\u3054\u9023\u7d61\u304f\u3060\u3055\u3044\u3002\nIf you are interested in this position, please feel free to contact us at the details below:\nRecruiter: Nichika Higa (linkedin.com\/in\/nichika-higa-30aa45240)\n\n\u30eb\u30cd\u30b5\u30b9\u306f\u3001\u300cTo Make Our Lives Easier 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