プロセス技術研究者

歩留まり改善エンジニア

生産技術エンジニア

Summary

1. Lead New Technology Integration transfer and matching to ensure Fab ramp success.

2. Responsible for factory product yield improvement and meeting all customer needs and ensure customer satisfaction.

 

Responsibilities

（Immediately after hiring)

1. Coordinate with all internal department to customer, including integration, process engineering, and manufacturing.

2. Advanced device technology development projects, device target setting, process scheme definition, and process scheme characterization.

3. Planning and setting priorities for execution of customer requests and delivery schedules.

4. Coordinate overall yield improvement / defect reduction / quality enhancement and new process technology qualification.

5. Coordinate X-fabs integration platform with an aim for engineering excellence.

6. Satisfactory customer interaction and issue handling from Fab side.

(Scope of change)There is a reassignment to the work specified by the Company.

 

Minimum Qualifications

Qualifications (Education, Skills, Certificates, etc.):

1. B.S. (~10+ years exp.), Masters (~5-10+ years exp.) or Ph.D. (~3+ years exp.) in an Engineering or Physics-related field or equivalent work experiences and background.

2. Experience in silicon wafer process, device, product, yield process development or high-volume manufacturing.

3. Advanced operations and program management experience.

4. Circuit design and PDK-Spice knowledge (desirable but not required).

  

Languages:

Business English (speaking and writing) and conversational Japanese, Conversational Mandarin (desirable)

  

Key Experience:

Experience in silicon semiconductor manufacturing and development.

  

Personal Attributes:

1. Must be willing to relocate to Taiwan for extended period for training

2. Must be a self-starter, highly organized, and have an ability to work independently across organizations. 

3. Demonstrated ability to communication complex problems through presentations and use of interpersonal persuasive skills. 

4. Must possess top-level business management, interpersonal, and facilitation skills. 

5. Desire for and demonstrated skill in leading and developing of persons and teams.

 

Preferred Qualifications

Experience with leading company of IDMs, silicon foundry fabs or fabless design house in global semiconductor industry is a huge plus.

 

 

Working Conditions

1. Location - （Immediately after hiring) 4106-1 Haramizu, Kikuyou-machi, Kikuchi-gun, Kumamoto, 869-1102 　(Scope of Change) Location determined by the Company

2. Working Days & Hours - 8:30～17:30

3. Benefits, Welfare - Health insurance, Employee pension, Employment insurance, Industrial accident compensation insurance, Pension plan, Retirement allowance plan, Annual leave, Commuting allowance: Actual expenses (maximum 50,000 yen/month), Housing allowance (In accordance with company's regulations)

4. Business Holiday - Saturdays, Sundays & Holidays, Vacation regulations：GW vacation, Summer vacation, Year-end and New Year vacations　※Follows the vacation regulations according to the company calendar

5. Recruitment Process - 3-4 interviews → offer

※Interview process is subject to change